1. Field of the Invention
The present invention relates to a method for forming a capacitor of a semiconductor device, and more particularly, to a method for forming a capacitor capable of improving polarization characteristics of a ferroelectric film.
2. Description of the Related Art
Capacitance of a capacitor is proportional to the capacitor electrode area and a dielectric constant of a dielectric material inserted between the electrodes, and inversely proportional to the thickness of the dielectric material. As the integration of semiconductor increases, the capacitor electrode area is decreased, thereby lowering the capacitance of the capacitor. Thus, in order to maintain required capacitance for the capacitor, a conventional method for using a dielectric film having a high dielectric constant, e.g., PZT(Pb(Zr,Ti)O.sub.3) film has been suggested.
Hereinafter, a conventional method for forming a capacitor of a semiconductor device, using PZT as a dielectric film, will be described with reference to the appended drawings.
Referring to FIG. 1, after defining a semiconductor substrate 22 into an active region and a field region, a field oxide film 24 is formed in the field region. Then, a gate electrode 26 is formed in the active region. Then, a source region (not shown) and a drain region (not shown) are formed in the semiconductor substrate around the gate electrode 26, to complete a transistor. Then, an inter-layer dielectric layer (28), an adhesion layer 30, a lower electrode 32 and a ferroelectric film 34 are formed in sequence on the entire surface of the resultant structure. The lower electrode 32 is electrically connected to the semiconductor substrate 22 via a contact hole (not shown). Here, the ferroelectric film 34 is formed of PZT by a sol-gel method. Then, an upper electrode (35) is formed on the ferroelectric film 34 and then patterned in cell units.
As described above, in the conventional method for forming the capacitor, the PZT layer is formed by the sol-gel method and is deposited on the lower electrode in a spin-coating manner. Thus, if the surface of a lower electrode on which the PZT layer is to be deposited is rough, the thickness of the PZT layer varies as a result of the uneven surface of the lower electrode. Further, morphology of the PZT layer is locally changed during a high-temperature heating process performed for crystallizing the PZT layer after deposition. As a result, the distribution of remaining polarization of the PZT layer is partially changed and the polarization characteristics of the PZT layer become non-uniform.
Also, if the sol-gel method is used, coating of the PZT layer is inferior along the border of the semiconductor substrate. This is caused by a weak adhesion between the lower electrode and the PZT layer. If the above phenomenon is severe, the PZT layer may not be deposited within a 3-4 cm margin of the lower electrode. If there is an inferior coating in the PZT layer, a crack 40 occurs at the border of the PZT layer 38 as shown in FIG. 2. As a result, impurities can contaminate the wafer 36 in a subsequent process.